China Chips Face Rising Costs Without EUV
Chinese manufacturers are using older equipment to make advanced chips, but the extra steps drive up expenses and reduce output efficiency.
By Alessia Romano ·

Chinese chipmakers are finding ways to build advanced processors despite lacking the latest lithography tools. They are using older deep ultraviolet machines to create complex layers. This method works, but it is expensive and slow. Experts say the trade-offs are becoming harder to ignore as technology demands increase.
Export controls have kept ASML's extreme ultraviolet machines out of China. These machines use 13.5nm-wavelength light to print fine details on chips. ASML is the only company that makes them. Without them, Chinese firms rely on deep ultraviolet equipment. This creates a significant gap in manufacturing capability between China and Western competitors. Some analysts estimate this gap is five years or more.
China has still made notable progress. A teardown of a Huawei phone in 2023 showed its processor was made without EUV. The chip was produced on a 7nm-class process. More recent analysis suggests the process has improved further. It is now closer to the density of 5nm manufacturing. However, it still trails the leading processes used by TSMC and Samsung.
The key technique is multiple patterning. Instead of printing a layer in one pass, manufacturers split the design. They build the layer step by step using several simpler patterns. Chris Mack, a semiconductor expert, notes that this approach has limits. Industry wisdom suggests three exposures on older tools cost about the same as one EUV pass. At four masks, EUV becomes the cheaper option for manufacturers.
Quality issues arise with each additional step. New patterns must align perfectly with previous ones. More exposures mean more chances for errors to accumulate. Designers can add space around features to fix this. This makes the chip larger and reduces the number of dies per wafer. Wafers cost tens of thousands of dollars. Mack notes that companies sell finished dies, not raw wafers.
Memory production shows the efficiency gap clearly. Morgan Stanley reported that Chinese maker CXMT produces fewer bits per wafer. Its output is about one-third of Western rivals. The bank calls lithography access a hard ceiling for memory development. Mack also warns that node labels like 5nm or 3nm are not always meaningful. SMIC's latest process is progress but not as scaled as established Western 5nm processes.
Older technology still has some potential. Micron built a DRAM generation without EUV using tight control. It pushed the limits of 193 immersion tools. Morgan Stanley thinks CXMT can also reach that level for high bandwidth memory. Researchers at Copenhagen Business School expect advanced packaging to help. They believe DUV can be used for latest DRAM generations by the end of the decade.
Micron eventually switched to EUV for its newest DRAM. The company says it gets more than 30% better density. EUV has its own problems, like stochastic effects that require higher doses. This adds to the cost. Mack says he finds it hard to believe 3nm or 2nm nodes are viable without EUV. The economics simply do not work for leading-edge logic chips.
Chinese firms will not stop trying. They can keep using DUV and accept larger chips or lower yields. They can also add more production capacity. Morgan Stanley predicts CXMT will grow its share of global DRAM supply. It expects this share to rise from 14% in 2026 to 16% in 2028. The bank also sees China increasing its AI chip self-sufficiency. It projects a rise from 42% in 2025 to 70% by 2030. A gap will remain in EUV, high bandwidth memory, and software.





